In printed circuit boards (PCBs), the power distribution systems are often parallel metal planes, which conduct prime power to loads performing the functions of, for example, microprocessors, serial data ports, memory, displays, amplifiers, detectors and the like. The electrical loads may be analog, digital or passive. Where an electronic switching operation is part of the circuit function, including the clocking of digital circuits, the process of digital switching results in unwanted electrical noise on the power distribution systems, sometimes called simultaneous switching noise (SSN), or ground bounce noise (GBN), and more generically called power plane noise (PPN).
In a printed circuit board, loads are connected to a power plane and a ground plane by vias, which are conductive objects disposed perpendicular to the electrically conductive planes, penetrating the dielectric layers separating the planes, and serving to connect components to signal lines, power and ground. Electrical noise (hereinafter “noise”) arises, for example, from the changing electrical currents traveling through vias that pass between the power and the ground planes. The rate of change of current, di/dt, in a via creates a transient magnetic field that radiates from the vicinity of the via as a cylindrical transverse electromagnetic (TEM) wave. Other components also may connect to the power or ground planes using vias, and the summation of the electromagnetic fields impinging on a via over the distance between ground and power planes results in inducing a noise voltage in the via, and thus the pick up of noise. For very fast digital switching circuits with high slew rates, the generated noise becomes very broadband and can contain microwave frequencies. When induced on a via connecting to a component in the circuit, this noise voltage may create electromagnetic interference (EMI). That is, the noise can deleteriously effect the other circuits by causing data errors in memory or computing devices, by desensitizing sensitive receivers, and related problems.
Typical engineering approaches to suppressing noise voltages on power distribution systems include adding radio frequency (RF) bypass capacitors, sometimes with widely differing capacitance values, at locations near the noise-generating vias. This approach may be effective up to several tens or hundreds of MHz depending on the design of the bypass capacitors, but becomes ineffective at higher frequencies due to the parasitic (incidental) inductance of the bypass capacitors and of the vias used to connect such capacitors to the power or ground planes. Another approach is to use extremely thin (2 mils or less) high-dielectric-constant layers between power and ground planes. This approach, sometimes called embedded capacitance, may lower the characteristic impedance of the power distribution system, however embedded capacitance does not prevent power plane resonances caused by TEM waves reflecting off the edges of the PCB. An embedded capacitance layer with a relatively high dielectric constant may actually exacerbate the problem of coupling noise between devices on the same power plane due to the high dielectric constant, which increases the density of resonant modes in a given frequency range.
An approach to suppressing power plane noise uses a periodic structure, known as a uniplanar compact photonic bandgap (UC-PBG) structure, as either the power or ground plane in a power distribution network (PDN). This EBG structure is a double-sided PCB where one side has a periodic metal pattern 10 connected by links 20 shown in FIG. 1, and the other side has a solid conductive ground plane. A parallel-plate waveguide (PPW), formed by a UC-PBG power plane next to a solid ground plane, will have inherent noise suppression properties due to the presence of electromagnetic stopbands. These stopbands are created by voltage waves traveling on the EBG structure that experience multiple reflections at periodic discontinuities where the reflections add up out-of-phase at locations on the EBG structure. Voltage waves whose frequency is within a stopband will decay exponentially with distance traveled similar to TE10 mode decay below cutoff in a rectangular waveguide. An alternative UC-PBG would have an inductive trace 20 between adjacent patches 30, which may be termed “L bridges,” as shown in FIG. 2. The fundamental stopband, or lowest frequency stopband, can begin at frequencies under 1 GHz when the dielectric layer is a conventional FR4 printed circuit board (PCB) material.
There are several problems with the UC-PGP concepts for TEM mode suppression in general, and for power supply noise suppression specifically. One problem is the relatively large size of the period used in the periodic structures, which may be about 30 mm. At least three contiguous unit cells are required to realize the multiple reflections needed for a stopband, and this 90×90 mm area is too large for many printed circuit board applications. The period will decrease if high permittivity substrate materials are used such as ceramic in an LTCC module. However, the largest production volume application for EBG structures is in printed circuit boards having electrical power distribution systems comprised of fiberglass laminates such as FR4. Another problem is that relatively narrow traces 20, 30 used to connect adjacent metallic portions 10 of the pattern are needed to achieve the relatively high series inductance required to place the lower band edge frequency of the fundamental stopband below 1 GHz. For instance, the L-bridges in the EBG structure of FIG. 2 may be only 0.02 mm (8 mils) in width. This narrow trace width limits the current-carrying capability of the periodic structure, essentially creating a fuse.
Additionally, there exists a frequency regime between that where bypass capacitors are effective in noise reduction, and the practical frequency regime for the use of UC-PGP structures where significant noise generating sources may be found in many electronic systems.
Another approach to suppressing power plane noise uses an electromagnetic bandgap (EBG) structure comprised of an array of shunt scatterers embedded between power and ground planes to create an omni-directional noise filter. Such an EBG structure includes a Sievenpiper high-impedance surface covered by a power plane to form a parallel-plate waveguide. The periodic loads of shunt scatterers may be comprised of an interior patch that is capacitively coupled to the power plane, along with a via connecting the patch capacitor to the ground plane. Herein, an individual patch capacitor and the associated via located between two plates of a parallel-plate waveguide are referred to as a resonant via. A resonant via is a shunt LC circuit formed by a series combination of at least one via and at least one capacitor.
An equivalent circuit model for a power-plane electromagnetic bandgap (EBG) structure using arrays of resonant vias was taught by McKinzie III and Rogers in a US patent application: 2005/0224912, filed on Mar. 17, 2004, which is commonly assigned and is incorporated herein by reference. A typical resonant-via EBG structure for power plane noise suppression is shown in FIG. 3 and consists of a square lattice array of square coplanar patches 11 located in close proximity to a conductive plate 12 of the PPW, each patch 11 having a corresponding via 13 connecting the patch to the opposing conductive plate 14 of the PPW.
A resonant via may be modeled, for example, as a shunt LC network where the L and C form a shunt branch circuit to ground, as shown in FIG. 4. Inductive grid EBG structures may be modeled for stopband performance, for example, using the transmission line equivalent circuit of FIG. 5 where a series inductance denoted by L2 connects adjacent square patches having dimension d.
One of the problems with EBG noise suppression structures of the type shown in FIGS. 3 and 4 (which use printed circuit resonant vias) is that a useful operating range is typically limited to frequencies above about 1 GHz to 2 GHz. However, significant noise, for example, from switching power supplies may be present, such as in the 30 MHz to 1 GHz frequency range. The lower band-edge cutoff frequency of the fundamental (lowest frequency) stopband of a resonant-via PPW EBG structure is given by
                              f          c                =                  1                      2            ⁢                                                  ⁢            π            ⁢                                                            C                  1                                ⁡                                  (                                                            L                      1                                        +                                                                                            μ                          o                                                ⁢                        h                                            4                                                        )                                                                                        (        1        )            
where, C1 is the capacitance between a single patch and an upper parallel-plateC1=∈r2∈0s2/t2;  (2)
L1 is the inductance of a single via located between a lower plate and patch
                                          L            1                    ≅                                                                      μ                  r                                ⁢                                  μ                  o                                ⁢                                  t                  1                                                            4                ⁢                                                                  ⁢                π                                      ⁡                          [                                                ln                  ⁡                                      (                                          1                      α                                        )                                                  +                α                -                1                            ]                                      ;        and                            (        3        )            h is the total height of the PPW, where h=t1+t2; ∈0 and μ0 are the permittivity and permeability of free space, μr is the relative permeability of the dielectric layer or layers surrounding the via, and α=r2/P2 is the ratio of via cross sectional area to the area occupied by a unit cell.
For a typical PCB application, the dielectric layers may have a relative dielectric constant of about 4. The period and hence patch dimensions are limited to about 0.3 inches, and the smallest practical dimension of t1 is about 4 mils. Vias are typically fabricated with a 20 mil diameter drill size, and the separation distance between the power and ground planes is typically 30 mils or less. Using these constraints, fc is limited to about 2.0 GHz, and the fundamental stopband of a typical resonant via PPW EBG may extend up to about 7 GHz.
One means of decreasing fc is to make the unit cell period larger than 0.3 inches. This will lower this cutoff frequency, which is inversely proportional to patch length, but the patches will also occupy much more PCB area. For example, to reduce fc from 2 GHz to 50 MHz would mean increasing the patch size from about 0.3 inches to about 12 inches, which is impractical in most applications as at least several contiguous cells are desirable to from a distinct stopband. Many power planes lack the required area.
Alternatively, a thinner and higher dielectric constant layer for the capacitive layer between the patches and upper plate may be selected. However, this choice dramatically increases manufacturing costs. Furthermore the thinner dielectric layers may not withstand “hipot” testing where up to 1500 volts of potential is applied across the layer. Hipot testing is now a requirement for PCB cores used in many computer workstations and high-end servers.
There thus exists a frequency regime above that where bypass capacitors are effective in noise reduction, and below that where the practical frequency regime exists for the use of UC-PGP structures, and where significant noise generating sources may be found in many electronic systems. Hence, there is a need for power plane noise suppression techniques having a fundamental stopband extending down to below 50 MHz and up to at least several GHz. Furthermore there is a need to suppress power plane PPW resonances in this same frequency range.